SETU Waterford offers a broad range of academic programmes from levels 6 to 10 on the national framework of qualifications across Business, Education, Engineering, Health Sciences, Humanities, Science and Computing.
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Students Landing PageSETU Waterford offers a broad range of academic programmes from levels 6 to 10 on the national framework of qualifications across Business, Education, Engineering, Health Sciences, Humanities, Science and Computing.
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The main activity of the group is the research and design of custom integrated circuits (ICs). Emphasis is on the solution of real world signal processing problems employing small area, low power and low voltage circuit techniques. The group has significant experience in the areas of data conversion and analogue signal processing.
Group Leader: Ken Deevy - [email protected]
Enquiries:
Mr. Ken Deevy,
South East Technological University,
Cork Road Campus,
Waterford,
Ireland.
Phone: +353 51 302060
Email: [email protected]
| Ken Deevy | [email protected] | View Staff Profile |
| Jason Hannon | [email protected] | |
| Karl Burke | [email protected] | |
| Kieran Berney | [email protected] | |
| Ciaran Foley | [email protected] |
R. Wang and K. Deevy, “Reconfigurable Adaptive Wireless Sensor Node Using IEEE 1451.4 Standard", Industrial Electronics Society IECON 2013 Proceedings, Vienna, November 2013, pp. 3988-3993.
R. Wang and K. Deevy, "Reconfigurable Adaptive Wireless Sensor Node", Irish Signals and Systems Conference Proceedings, Maynooth, June 2012.
K. Deevy, "Research Activity in Ireland's Institutes of Technology", Higher Education Doctoral Conference, University of Sheffield, February 2011.
R. Wang and K. Deevy, “Reconfigurable Adaptive Wireless Sensors”, Globe Forum Dublin, November 2010.
K. Deevy, R. Wang and N. Vanama, “Novel Sensor Design Using Mixed Signal Processing Technologies”, 4th Workshop on Wireless Sensor Networks’, Nortel Networks, Galway, July 2008.
K. Berney and K. Deevy, “Precision CMOS Oscillator Design”, ISSC Proceedings, July 2004..
K. Burke and K. Deevy, “Programmable Analogue Integrated Circuit”, ISSC Proceedings, June 2003.
J. Hannon and K. Deevy, “Component tolerant A/D Converter Design”, ISSC Proceedings, June 2002.
D. O’ Connell and K. Deevy, “Digital Correction Techniques for Data Converters”, ISSC Proceedings, June 2001.
G. Walsh, K. Deevy and D. O’ Connell, “An 8-10 bit, Embedded Small Size Algorithmic Digital-to Analogue Converter”, ISSC Proceedings, June 2000.
M. Connolly and K. Deevy, “A 6 bit 50 MS/s Pipeline Converter for a Digital-tape Read Channel”, ISSC Proceedings, June 2000.
D. Dalton, G. Spalding, H. Reyhani, T. Murphy, K. Deevy, M. Walsh, and P. Griffin, “A 200-MSPS 6-Bit Flash ADC in 0.6-um CMOS”, IEEE Trans. Circuits & Systems_II, Vol.45,pp. 1433-1444, Nov. 1999
| Project Name | Project Information |
|---|---|
| Shower Timer Energy Saving System |
This applied research project involved the design, analysis and development of a novel shower timer and control system designed with both energysaving and water conservation in mind. The research was funded under the EI Innovation Voucher Scheme. Amount: ~ €5k |
| Cloud Enabled Technology Road-map and Demo System |
This applied research project involved a comprehensive cloud technology enable roadmap combined with the development of a basic demo system to demonstrate the capabilites of a suitable technology. The output from the project was a comprehensive technology roadmap report and basic demo system. This project was carried in conjunction with WITs TSSG research centre based at the Carriganore research campus. The research was funded by an Enterprise Ireland Innovation Voucher. Amount: ~ €5k |
| Display Technology Audit and Analysis |
This applied research project involved a comprehensive survey and analysis of currently available and future proof display technologies for use in proprietary applications. The output from the project was a comprehensive technology audit and analysis report. The research was funded by an Enterprise Ireland Innovation Voucher. Amount: ~ €5k |
| Cloud Enabled Drug Delivery System |
This research project involved the design, analysis, build and test of a miniature cloud eneable drug delivery system for a MNC. It was co-developed with WITs TSSG research centre. This applied research project was 100% funded by Industry. Amount: ~ €17k |
| Shop Window Graphics Touch Control System |
This applied research project involved the design, analysis and development of a capacitive window glass capacitive touch sensor for controlling the display of PC graphics inside the shop, even during closed hours. The research was funded under the EI Innovation Voucher Scheme. Amount: ~ €5k |
| Embedded Log Burner Control System |
This applied research project involved the design, analysis and development of an embedded control system for controlling the combustion of a log burner furnace. It was designed to replace an exisitng PLC solution. The research was funded under the EI Innovation Voucher Scheme. Amount: ~ €5k |
| Electric Fence Pulse Energy Measurement |
This applied research consultancy project involved developing a measurement system for measuring and characterising the electrical pulse energy being emitted from different types and models of electric fence control boxes. The research was 100% industry funded Amount: ~ €2k |
| Voltmeter for Extremely High Voltage Pulses |
This research project involved the design, analysis and development of a voltmeter for measuring extremely high voltage pulses on a stock control system. The system was capable of measuring voltage pulses up to 20 kV and beyond. The research was funded under the EI Innovation Voucher Scheme. Amount: ~ €5k |
|
Capacitive Touch Sensor for Stock Control Systems |
This research project involved the design, analysis and development of a line touch sensor technology for high voltage stock control systems, based on capacitive sensor technology. The research was funded under the EI Innovation Voucher Scheme. Amount: ~ €5k |
| Accurate CMOS Current Reference Design |
This research project involved the design, analysis and simulation of an accurate CMOS current reference design on a 0.8 um CMOS technology. It formed the basis of a full-time research Masters. The research was funded by a South East Technological University bursary Amount: ~ €24k |
| High Density Capacitors in CMOS Technology |
This research project involved the design, analysis, simulation and fabrication of high density CMOS capacitors. Test circuits were developed, underwent physical layout and were fabricated on a 0.8 um CMOS process. It formed the basis of a full-time research Masters. The research was funded under Strand 1 Technological Sector Research programme. Amount: ~ €41k |
| Precision CMOS Oscillator Circuit |
This research project involved the design, analysis and simulation of a circuit to implement a precision CMOS oscillator. It formed the basis of a full-time research Masters. A paper was published at the Irish Signals and Systems conference. The research was funded under Strand 1 Technological Sector Research programme. Amount: ~ €38k |
| Programmable Analogue Integrated Circuit |
This research project involved the design, analysis and development of a programmable analogue integrated circuit which enabled the device to be configured in a variety of configurations, e.g. signal multiplication, division, subtraction, addition, comparison, an ADC, a DAC, and a sample and hold circuit. It formed the basis of a full-time research Masters. The circuit was designed and fabricated on a 0.8 um CMOS process. A paper was published at the Irish Signals and Systems conference. The research was funded under Strand 1 Technological Sector Research programme. Amount: ~ €37k |
| Small Size Capacitor Tolerant Cyclic ADC |
This research project involved the design, analysis and simulation of a small size cyclic ADC which employs switched capacitor techniques to makes the ADC insensitive to capactor mismatch. The research project was designed and fabricated on a 0.8 um CMOS process. It formed the basis of a full-time research Masters. A paper was published at the Irish Signals and Systems conference. The research was co-funded by Enterprise Ireland and Analog Devices Amount: ~ €44k |
| Digital Error Correction Techniques for Data Converters |
This research project involved the design, analysis and simulation of hardware techniques for digital error correction techniques for data converters on 0.8 um CMOS technology. It formed the basis of a full-time research Masters. A paper was published at the Irish Signals and Systems conference. The research was funded under the Strand 1 Technological Sector Research programme. Amount: ~ €38k |
| Embedded Small Size D/A Converter for Use in ASIC Design |
This research project involved the design, analysis and development of a 10-bit small size algorithmic D/A converter in 0.8 um CMOS technology. It formed the basis of a full-time research Masters. A paper was published at the Irish Signals and Systems conference. The research was funded under Strand 1 Technological Sector Research programme. Amount: ~ €42k |
| Small Size 10-bit algorithmic D/A Converter |
This project involves the design, analysis and development of a 10-bit small size algorithmic D/A converter in 0.8 um CMOS technology. It formed the basis of a full-time research Masters. A paper was published at the Irish Signals and Systems conference. The research was funded under Strand 1 Technological Sector Research programme. Amount: ~ €42k |
| Flexible adaptable high speed bar code scanner |
This project involves the design, analysis and development of a high speed image processing system for reading barcodes in various orientations and magnifications. It was funded under Strand 1 Technological Sector Research programme. Amount: ~ €35 |
| High Speed Pipelined A/D Converter for Digital Read Channel |
This research project involved the design, analysis, and simulation of a 10 bit high speed pipelined A/D converter. It was co-funded by Enterprise Ireland and an industry partner. The project was carried in partnership with an industry semiconductor company, and also formed the basis for a Masters degree programme. Amount: ~€35 |
| Small size current mode ADC |
This research project involved the design, analysis and simulation of a small size current operated A/D converter. As part of the project current source array was design, fabricated in a 0.8um CMOS process, and tested in the lab. The project was 100% funded by the Strand 1 Technological Sector Research programme. Funding ~€45k |
| Self-powered Low-Energy Wireless Sensor and OLED Display Boards |
The MSR group was a constituent part of a research programme for investigating novel Innovative Photovoltaic Technologies and their applications. This applied research project was a part of the Wales Ireland Network for Innovative Photovoltaic Technologies (WIN-IPT) an was an industry-informed initiative, designed to promote the development of innovation and enhance business opportunities for SMEs working in the area of Photovoltaic (PV) cells. The MSR group concentrated on two key areas within the WIN-IPT programme; a) Self-powered low-energy wireless sensors for building management and control functions b) Self-powered low energy display technologies This research was funded under the Wales-Ireland Interegg programme. Amount: ~€90k (just this electronics and dispaly segment of the project) |
SETU Waterford, Cork Road, Waterford City, 
